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FFTs with Near-Optimal Memory Access Through Block Data Layouts: Algorithm, Architecture and Design Automation., , и . J. Signal Process. Syst., 85 (1): 67-82 (2016)ZCOMP: Reducing DNN Cross-Layer Memory Footprint Using Vector Extensions., , и . MICRO, стр. 126-138. ACM, (2019)MobileDets: Searching for Object Detection Architectures for Mobile Accelerators., , , , , , , , и . CoRR, (2020)Enabling portable energy efficiency with memory accelerated library., , , , , , и . MICRO, стр. 750-761. ACM, (2015)Mitigating Edge Machine Learning Inference Bottlenecks: An Empirical Study on Accelerating Google Edge Models., , , , , , , и . CoRR, (2021)An Evaluation of Edge TPU Accelerators for Convolutional Neural Networks., , , , и . CoRR, (2021)Apollo: Transferable Architecture Exploration., , , , , , , , , и . CoRR, (2021)Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes., , , и . FCCM, стр. 188-191. IEEE Computer Society, (2012)Data reorganization in memory using 3D-stacked DRAM., , и . ISCA, стр. 131-143. ACM, (2015)HAMLeT: Hardware accelerated memory layout transform within 3D-stacked DRAM., , и . HPEC, стр. 1-6. IEEE, (2014)