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Framework for economical error recovery in embedded cores., , and . IOLTS, page 146-153. IEEE, (2014)Selective replication: A lightweight technique for soft errors., , , and . ACM Trans. Comput. Syst., 27 (4): 8:1-8:30 (2009)Penelope: The NBTI-Aware Processor., , and . MICRO, page 85-96. IEEE Computer Society, (2007)Issue system protection mechanisms., , , and . ICCD, page 599-604. IEEE Computer Society, (2008)Architectures for online error detection and recovery in multicore processors., , , , , , , , and . DATE, page 533-538. IEEE, (2011)An efficient solver for Cache Miss Equations., , , and . ISPASS, page 139-145. IEEE Computer Society, (2000)Accelerating microprocessor silicon validation by exposing ISA diversity., , , , and . MICRO, page 386-397. ACM, (2011)A Fast and Accurate Approach to Analyze Cache Memory Behavior (Research Note)., , , and . Euro-Par, volume 1900 of Lecture Notes in Computer Science, page 194-198. Springer, (2000)Optimizing cache miss equations polyhedra., , , and . SIGARCH Comput. Archit. News, 28 (1): 43-52 (2000)Implementing End-to-End Register Data-Flow Continuous Self-Test., , , , and . IEEE Trans. Computers, 60 (8): 1194-1206 (2011)