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Disambiguation of "Peng, Xizhu"

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A Sinusoidal Fitting-based Digital Foreground Calibration Technique for Pipelined ADC.

, , , , and . ASICON, page 1-4. IEEE, (2023)

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Changgeng Peng

Xiao-Wei Peng

Martin Peng

Jin Peng

Lei Peng

 

Other publications of authors with the same name

A 7.6b ENOB, 16× Gain, 360mVpp Output Swing, Open-Loop Charge Steering Amplifier., , , and . IEEE Access, (2020)A low-power on-chip calibration technique for pipelined ADCs., , , , and . ASICON, page 612-615. IEEE, (2017)A 0.5-nW 29ppm/°C Voltage Reference Circuit., , , and . APCCAS, page 107-110. IEEE, (2018)A Timing Mismatch Background Calibration Algorithm With Improved Accuracy., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (8): 1591-1595 (2021)DBP: Distributed Power Budgeting for Many-Core Systems in Dark Silicon., , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (12): 5727-5731 (2022)A Low-Power Low-Cost On-Chip Digital Background Calibration for Pipelined ADCs., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 27 (11): 2568-2574 (2019)A Neural Network Based Calibration Technique for TI-ADCs with Derivative Information., , , , , , and . ISCAS, page 1-5. IEEE, (2023)A Back-Gate-Input Clocked Comparator with Improved Speed and Reduced Noise in 22-nm SOI CMOS., , , and . ISCAS, page 1-5. IEEE, (2021)A Three-Stage Comparator and Its Modified Version With Fast Speed and Low Kickback., , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (7): 1485-1489 (2021)Design and High-Speed Demonstration of Single-Flux-Quantum Bit-Serial Floating-Point Multipliers Using a 10kA/cm2 Nb Process., , , , , , and . IEICE Trans. Electron., 97-C (3): 188-193 (2014)