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Disambiguation of "Gonugondla, Sujan K."

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PROMISE: An End-to-End Design of a Programmable Mixed-Signal Accelerator for Machine-Learning Algorithms.

, , , , , , , and . ISCA, page 43-56. IEEE Computer Society, (2018)

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Sujan Rajbhandari

Mark-Alexander Sujan

Sujan Pandey

Aman K K Bhasin

K Schweizerhof

 

Other publications of authors with the same name

A 481pJ/decision 3.4M decision/s Multifunctional Deep In-memory Inference Processor using Standard 6T SRAM Array., , , and . CoRR, (2016)Fundamental Limits on Energy-Delay-Accuracy of In-Memory Architectures in Inference Applications., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (10): 3188-3201 (2022)An MRAM-Based Deep In-Memory Architecture for Deep Neural Networks., , , , and . ISCAS, page 1-5. IEEE, (2019)Fundamental Limits on the Precision of In-memory Architectures., , , and . ICCAD, page 128:1-128:9. IEEE, (2020)KeyRAM: A 0.34 uJ/decision 18 k decisions/s Recurrent Attention In-memory Processor for Keyword Spotting., , , and . CICC, page 1-4. IEEE, (2020)A Variation-Tolerant In-Memory Machine Learning Classifier via On-Chip Training., , and . IEEE J. Solid State Circuits, 53 (11): 3163-3173 (2018)An energy-efficient memory-based high-throughput VLSI architecture for convolutional networks., , , and . ICASSP, page 1037-1041. IEEE, (2015)A 19.4 nJ/decision 364K decisions/s in-memory random forest classifier in 6T SRAM array., , and . ESSCIRC, page 263-266. IEEE, (2017)An In-Memory VLSI Architecture for Convolutional Neural Networks., , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (3): 494-505 (2018)Deep In-Memory Architectures in SRAM: An Analog Approach to Approximate Computing., , and . Proc. IEEE, 108 (12): 2251-2275 (2020)