Author of the publication

MFAST: a single chip highly parallel image processing architecture.

, , , and . ICIP, page 69-72. IEEE Computer Society, (1995)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

A low-power threshold logic family., , , , and . ICECS, page 657-660. IEEE, (2002)An investigation of binary CLA and ripple CMOS adder designs., , and . Microprocess. Microprogramming, 40 (1): 1-21 (1994)Implementation of a streaming execution unit., , , and . J. Syst. Archit., 49 (12-15): 599-617 (2003)Microcode Processing: Positioning and Directions., , and . IEEE Micro, 23 (4): 21-31 (2003)Vector ISA Extension for Sparse Matrix-Vector Multiplication., , and . Euro-Par, volume 1685 of Lecture Notes in Computer Science, page 708-715. Springer, (1999)Sandbridge Software Tools., , , , , , and . SAMOS, volume 3553 of Lecture Notes in Computer Science, page 269-278. Springer, (2005)Reconfigurable Multiple Operation Array., and . SAMOS, volume 3553 of Lecture Notes in Computer Science, page 22-31. Springer, (2005)A 2D Addressing Mode for Multimedia Applications., , and . Embedded Processor Design Challenges, volume 2268 of Lecture Notes in Computer Science, page 291-306. Springer, (2002)Loading rho-µ-Code: Design Considerations., , and . SAMOS, volume 3133 of Lecture Notes in Computer Science, page 11-19. Springer, (2004)Digital neural emulators using tree accumulation and communication structures., , and . IEEE Trans. Neural Networks, 3 (6): 934-950 (1992)