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Hardware Design of a FPGA-Based Synchronizer for Hiperlan/2.

, , , , and . FPL, volume 3203 of Lecture Notes in Computer Science, page 494-504. Springer, (2004)

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Low Complexity Time Synchronization Algorithm for OFDM Systems with Repetitive Preambles., , , and . J. Signal Process. Syst., 68 (3): 287-301 (2012)Synchronization techniques for HIPERLAN/2., , and . VTC Fall, page 762-766. IEEE, (2001)Architectures for the Implementation of a OFDM-WLAN Viterbi Decoder., , , , and . J. Signal Process. Syst., 52 (1): 35-44 (2008)Design of Power and Area Efficient Digital Down-converters for Broadband Communications Systems., , , , and . J. Signal Process. Syst., 56 (1): 35-40 (2009)Hardware Design of a FPGA-Based Synchronizer for Hiperlan/2., , , , and . FPL, volume 3203 of Lecture Notes in Computer Science, page 494-504. Springer, (2004)Efficient FPGA-based QPSK Demodulation Loops: Application to the DVB Standard., , , and . FPL, volume 2438 of Lecture Notes in Computer Science, page 102-111. Springer, (2002)Reduction of power consumption in a Viterbi Decoder for OFDM-WLAN., , , , and . ICECS, page 586-588. IEEE, (2007)DIGIMOD: A Tool to Implement FPGA-Based Digital IF and Baseband Modems., , , , , , , , , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 988-991. Springer, (2003)Symbol Timing Synchronization in FPGA-Based Software Radios: Application to DVB-S., , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 31-40. Springer, (2003)Analysis and Contrast Between STC and Spatial Diversity Techniques for OFDM WLAN with Channel Estimation., , , and . SAPIR, volume 3126 of Lecture Notes in Computer Science, page 170-178. Springer, (2004)