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Hardware Design of a FPGA-Based Synchronizer for Hiperlan/2.

, , , , and . FPL, volume 3203 of Lecture Notes in Computer Science, page 494-504. Springer, (2004)

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Area-optimized implementation of quadrature direct digital frequency synthesizers on LUT-based FPGAs., and . IEEE Trans. Circuits Syst. II Express Briefs, 50 (3): 135-138 (2003)One Minimum Only Trellis Decoder for Non-Binary Low-Density Parity-Check Codes., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 62-I (1): 177-184 (2015)Hardware Design of a FPGA-Based Synchronizer for Hiperlan/2., , , , and . FPL, volume 3203 of Lecture Notes in Computer Science, page 494-504. Springer, (2004)Efficient FPGA-based QPSK Demodulation Loops: Application to the DVB Standard., , , and . FPL, volume 2438 of Lecture Notes in Computer Science, page 102-111. Springer, (2002)Reduction of power consumption in a Viterbi Decoder for OFDM-WLAN., , , , and . ICECS, page 586-588. IEEE, (2007)Quadrature direct digital frequency synthesizers: area-optimized design map for LUT-based FPGAs., and . ISCAS (2), page 260-263. IEEE, (2003)FPGA-implementation of atan(Y/X) based on logarithmic transformation and LUT-based techniques., , and . J. Syst. Archit., 56 (11): 588-596 (2010)DIGIMOD: A Tool to Implement FPGA-Based Digital IF and Baseband Modems., , , , , , , , , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 988-991. Springer, (2003)Symbol Timing Synchronization in FPGA-Based Software Radios: Application to DVB-S., , and . FPL, volume 2778 of Lecture Notes in Computer Science, page 31-40. Springer, (2003)High Performance Quadrature Digital Mixers for FPGAs., and . FPL, volume 2438 of Lecture Notes in Computer Science, page 905-914. Springer, (2002)