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Prebypass: Software Register File Bypassing for Reduced Interconnection Architectures., , , , and . DSD, page 157-164. IEEE, (2022)BrainWave: an energy-efficient EEG monitoring system - evaluation and trade-offs., , , and . ISLPED, page 181-186. ACM, (2020)Multi-Level Optimization of an Ultra-Low Power BrainWave System for Non-Convulsive Seizure Detection., , , , , and . IEEE Trans. Biomed. Circuits Syst., 15 (5): 1107-1121 (2021)Quantization of deep neural networks for accumulator-constrained processors., , and . Microprocess. Microsystems, (2020)Quantization of Constrained Processor Data Paths Applied to Convolutional Neural Networks., , and . DSD, page 357-364. IEEE Computer Society, (2018)CONVOLVE: Smart and seamless design of smart edge processors., , , , , , , , , and 18 other author(s). CoRR, (2022)Converter-Free Power Delivery Using Voltage Stacking for Near/Subthreshold Operation., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 29 (6): 1039-1051 (2021)Voltage Stacked Design of a Microcontroller for Near/Sub-threshold Operation., , , , and . SoCC, page 370-375. IEEE, (2019)PetaOps/W edge-AI $\mu$ Processors: Myth or reality?, , , , , , , , , and 18 other author(s). DATE, page 1-6. IEEE, (2023)