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Disambiguation of "Panda, Preeti Ranjan"

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Memory Architectures.

. Handbook of Hardware/Software Codesign, Springer, (2017)

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Preeti Bajaj

Satyananda Panda

Preeti Kumari

Preeti Sareen

Preeti Bhargava

 

Other publications of authors with the same name

Integrated Exploration Methodology for Data Interleaving and Data-to-Memory Mapping on SIMD Architectures., , , , and . ACM Trans. Embed. Comput. Syst., 15 (3): 59:1-59:23 (2016)An Efficient Pipelined VLSI Architecture for Lifting-Based 2D-Discrete Wavelet Transform., and . ISCAS, page 1377-1380. IEEE, (2007)Editorial.. IEEE Embed. Syst. Lett., 15 (4): 169 (December 2023)Estimating the Complexity of Synthesized Designs from FSM Specifications., , and . IEEE Des. Test Comput., 10 (1): 30-35 (1993)Energy efficient data flow transformation for Givens Rotation based QR Decomposition., , , , and . DATE, page 1-4. European Design and Automation Association, (2014)Exploiting temporal decoupling to accelerate trace-driven NoC emulation., , , and . CODES+ISSS, page 315-324. ACM, (2011)Rank based dynamic voltage and frequency scaling fortiled graphics processors., , and . CODES+ISSS, page 3-12. ACM, (2010)Memory Architectures.. Handbook of Hardware/Software Codesign, Springer, (2017)Efficient utilization of scratch-pad memory in embedded processor applications., , and . ED&TC, page 7-11. IEEE Computer Society, (1997)Exploration of Loop Unroll Factors in High Level Synthesis., , , , and . VLSID, page 465-466. IEEE Computer Society, (2018)