( en | de | ru )

 

Disambiguation of "Dandapat, Anup"

Author of the publication

copydeleteadd this publication to your clipboard
A Novel Methodology for Design of Cyclic Combinational Circuits.

, , , and . J. Low Power Electron., 12 (3): 205-217 (2016)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Vilma Anupöld

Anup Das

Anup Pradhan

Anup Ramachandran

Anup Bhattacharya

 

Other publications of authors with the same name

A Low-Voltage 13T Latch-Type Sense Amplifier with Regenerative Feedback for Ultra Speed Memory Access., , , and . VLSID, page 341-346. IEEE Computer Society, (2017)ASIC design of a high speed low power circuit for factorial calculation using ancient Vedic mathematics., , , and . Microelectron. J., 42 (12): 1343-1352 (2011)Content-addressable memory using selective-charging and adaptive-discharging scheme for low-power hardware search engine., , , and . Integr., (2024)Improved matrix multiplier design for high-speed digital signal processing applications., , , and . IET Circuits Devices Syst., 8 (1): 27-37 (2014)Design of a 1.29-1.61GHz LC-VCO with Improved Phase Noise and Figure-of-Merit (FoMT) for GPS and Satellite Navigation., , and . J. Circuits Syst. Comput., 31 (16): 2250274:1-2250274:16 (2022)A Low-Power Split-Controlled Single Ended Storage Content Addressable Memory., , , and . iSES, page 369-372. IEEE, (2019)Reciprocal Unit Based on Vedic Mathematics for Signal Processing Applications., , , and . ISED, page 41-45. IEEE Computer Society, (2013)Design of High Speed Vedic Multiplier for Decimal Number System., , , and . VDAT, volume 7373 of Lecture Notes in Computer Science, page 79-88. Springer, (2012)The analogy of matchline sensing techniques for content addressable memory (CAM)., , , and . IET Comput. Digit. Tech., 14 (3): 87-96 (2020)Vedic Divider: Novel Architecture (ASIC) for High Speed VLSI Applications., , , and . ISED, page 67-71. IEEE Computer Society, (2011)