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A 160K Gates/4.5 KB SRAM H.264 Video Decoder for HDTV Applications., , , , , , , и . IEEE J. Solid State Circuits, 42 (1): 170-182 (2007)A High Throughput VLSI Architecture Design for H.264 Context-Based Adaptive Binary Arithmetic Decoding with Look Ahead Parsing., , , , и . ICME, стр. 357-360. IEEE Computer Society, (2006)Low complexity fractional motion estimation with adaptive mode selection for H.264/AVC., , , и . ICME, стр. 673-678. IEEE Computer Society, (2010)A 7mW-to-183mW Dynamic Quality-Scalable H.264 Video Encoder Chip., , , , , , , , , и 2 other автор(ы). ISSCC, стр. 280-603. IEEE, (2007)High-Throughput H.264/AVC High-Profile CABAC Decoder for HDTV Applications., и . IEEE Trans. Circuits Syst. Video Techn., 19 (9): 1395-1399 (2009)A Low Complexity High Quality Interger Motion Estimation Architecture Design for H.264/AVC., , , , , , и . APCCAS, стр. 398-401. IEEE, (2006)A Dynamic Quality-scalable H.264 Video Encoder., , , , , , и . ISCAS, стр. 1932. IEEE, (2009)A H.264/MPEG-2 dual mode video decoder chip supporting temporal/spatial scalable video., , , , , , , и . ASP-DAC, стр. 73-74. IEEE, (2011)A dynamic quality-scalable H.264 video encoder chip., , , , , , и . ASP-DAC, стр. 125-126. IEEE, (2009)A Quality Scalable H.264/AVC Baseline Intra Encoder for High Definition Video Applicaitons., , , , , и . SiPS, стр. 521-526. IEEE, (2007)