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Sparse VLSI Layout Feature Extraction: A Dictionary Learning Approach.

H. Geng, H. Yang, B. Yu, X. Li, and X. Zeng. ISVLSI, page 488-493. IEEE Computer Society, (2018)

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Haibo Xuan

Zhengrong Xuan

Yue Xuan

Chaoting Xuan

Yimin Xuan

Other publications of authors with the same name

Direct Nonlinear Order Reduction with Variational Analysis.L. Feng, X. Zeng, C. Chiang, D. Zhou, and Q. Fang. DATE, page 1316-1321. IEEE Computer Society, (2004)PulsePrint: Single-arm-ECG biometric human identification using deep learning.Q. Zhang, D. Zhou, and X. Zeng. UEMCON, page 452-456. IEEE, (2017)Efficient spectral graph sparsification via Krylov-subspace based spectral perturbation analysis.S. Zhang, F. Yang, X. Zeng, D. Zhou, S. Li, and X. Hu. ISCAS, page 1-4. IEEE, (2017)A Memristor Crossbar-Based Computation Scheme with High Precision.J. Li, F. Peng, F. Yang, and X. Zeng. CoRR, (2016)Fast compressive sensing reconstruction algorithm on FPGA using Orthogonal Matching Pursuit.Z. Yu, J. Su, F. Yang, Y. Su, X. Zeng, D. Zhou, and W. Shi. ISCAS, page 249-252. IEEE, (2016)A yield-enhanced global optimization methodology for analog circuit based on extreme value theory.M. Li, G. Huang, X. Wu, L. Qian, X. Zeng, and D. Zhou. Sci. China Inf. Sci., 59 (8): 082401:1-082401:16 (2016)High-Dimensional and Multiple-Failure-Region Importance Sampling for SRAM Yield Analysis.M. Wang, C. Yan, X. Li, D. Zhou, and X. Zeng. IEEE Trans. Very Large Scale Integr. Syst., 25 (3): 806-819 (2017)An Efficient FPGA Implementation of Orthogonal Matching Pursuit With Square-Root-Free QR Decomposition.X. Ge, F. Yang, H. Zhu, X. Zeng, and D. Zhou. IEEE Trans. Very Large Scale Integr. Syst., 27 (3): 611-623 (2019)C-YES: An Efficient Parametric Yield Estimation Approach for Analog and Mixed-Signal Circuits Based on Multicorner-Multiperformance Correlations.W. Zeng, H. Zhu, X. Zeng, D. Zhou, R. Liu, and X. Li. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 36 (6): 899-912 (2017)Model Order Reduction of Parameterized Interconnect Networks via a Two-Directional Arnoldi Process.Y. Li, Z. Bai, Y. Su, and X. Zeng. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 27 (9): 1571-1582 (2008)

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Disambiguation of "Zeng, Xuan"

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URL
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Sparse VLSI Layout Feature Extraction: A Dictionary Learning Approach.

Please choose a person to relate this publication to

Haibo Xuan

Zhengrong Xuan

Yue Xuan

Chaoting Xuan

Yimin Xuan

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Zeng, Xuan"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Sparse VLSI Layout Feature Extraction: A Dictionary Learning Approach.

Please choose a person to relate this publication to

Haibo Xuan

Zhengrong Xuan

Yue Xuan

Chaoting Xuan

Yimin Xuan

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Sparse VLSI Layout Feature Extraction: A Dictionary Learning Approach.