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A multi-standard mobile digital video receiver in 0.18μm CMOS process.

K. Barnett, H. Muthali, S. Sengupta, Y. Feng, B. Yang, Z. Xiong, T. Kim, J. Jaffee, and C. Conroy. ESSCIRC, page 154-157. IEEE, (2008)

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8.5 A Scalable Adaptive ADC/DSP-Based 1.25-to-56Gbps/112Gbps High-Speed Transceiver Architecture Using Decision-Directed MMSE CDR in 16nm and 7nm.D. Xu, Y. Kou, P. Lai, Z. Cheng, T. Cheung, L. Moser, Y. Zhang, X. Liu, M. Lam, H. Jia and 10 other author(s). ISSCC, page 134-136. IEEE, (2021)Single-chip RF CMOS UMTS/EGSM transceiver with integrated receive diversity and GPS.A. Hadjichristos, M. Cassia, H. Kim, C. Park, K. Wang, W. Zhuo, B. Ahrari, R. Brockenbrough, J. Chen, C. Donovan and 16 other author(s). ISSCC, page 118-119. IEEE, (2009)A multi-standard mobile digital video receiver in 0.18μm CMOS process.K. Barnett, H. Muthali, S. Sengupta, Y. Feng, B. Yang, Z. Xiong, T. Kim, J. Jaffee, and C. Conroy. ESSCIRC, page 154-157. IEEE, (2008)Next generation wireless-multimedia devices: who is up for the challenge?J. Rey, A. Kuehlmann, J. Rabaey, C. Conroy, T. Vucurevich, I. Kawasaki, and T. Tarim. DAC, page 353-354. ACM, (2008)Hard disk drive read channels: technology and trends.H. Thapar, S. Lee, C. Conroy, R. Contreras, A. Yeung, J. Chern, T. Pan, and S. Shih. CICC, page 309-316. IEEE, (1999)A low-power CMOS Bluetooth RF transceiver with a digital offset canceling DLL-based GFSK demodulator.S. Byun, C. Park, Y. Song, S. Wang, C. Conroy, and B. Kim. IEEE J. Solid State Circuits, 38 (10): 1609-1618 (2003)A four-channel 3.125-Gb/s/ch CMOS serial-link transceiver with a mixed-mode adaptive equalizer.J. Kim, J. Yang, S. Byun, H. Jun, J. Park, C. Conroy, and B. Kim. IEEE J. Solid State Circuits, 40 (2): 462-471 (2005)

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A multi-standard mobile digital video receiver in 0.18μm CMOS process.

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Disambiguation of "Conroy, Cormac"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML A multi-standard mobile digital video receiver in 0.18μm CMOS process.

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A multi-standard mobile digital video receiver in 0.18μm CMOS process.