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Disambiguation of "Acharya, Lomash Chandra"

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An Efficient Standard Cell Design Methodology by Exploiting Body Biasing and Poly Biasing in FDSOI for NTV Regime.

, , , , , , and . APCCAS, page 105-109. IEEE, (2023)

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Raghunath Acharya

Diwakar Acharya

Snigdhatanu Acharya

Sashikant Acharya

Ramamoorthy Acharya

 

Other publications of authors with the same name

Phase Noise Analysis of Separately Driven Ring Oscillators., , , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (11): 4415-4428 (2022)Significance of Organic Ferroelectric in Harnessing Transient Negative Capacitance Effect at Low Voltage Over Oxide Ferroelectric., , , and . ISCAS, page 3423-3427. IEEE, (2022)ABB Assisted Area Efficient Vernier Delay Line Time-to-Digital Converter for Low Voltage Applications., , , , , , , , , and . APCCAS, page 100-104. IEEE, (2023)Beyond SPICE Simulation: A Novel Variability-Aware STA Methodology for Digital Timing Closure., , , , , , , , , and 2 other author(s). SMACD, page 1-4. IEEE, (2023)Aging-Aware Timing Model of CMOS Inverter: Path Level Timing Performance and Its Impact on the Logical Effort., , , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 42 (8): 2657-2663 (2023)Variation Aware Timing Model of CMOS Inverter for an Efficient ECSM Characterization., , , , , and . ISQED, page 251-256. IEEE, (2021)An Efficient Standard Cell Design Methodology by Exploiting Body Biasing and Poly Biasing in FDSOI for NTV Regime., , , , , , and . APCCAS, page 105-109. IEEE, (2023)Generalized Edge Propagation and Multi-Band Frequency Switching Mechanism for MSSROs., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 70 (9): 3609-3613 (September 2023)Negative capacitance gate stack and Landau FET-based voltage amplifiers and circuits: Impact of ferroelectric thickness and domain variations., , , and . Microelectron. J., (December 2023)