Author of the publication

Time Synchronization Technique Hardware Implementation for OFDM Systems With Hermitian Symmetry for VLC Applications.

, , and . IEEE Access, (2023)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

An Estimator for the ASIC Footprint Area of Lightweight Cryptographic Algorithms., , , and . IEEE Trans. Ind. Informatics, 10 (2): 1216-1225 (2014)Smart Hardening for Round-based Encryption Algorithms: Application to Advanced Encryption Standard., , , , , and . IOLTS, page 167-168. IEEE Computer Society, (2008)Logic Transformations by Multiple Wire Network Addition., , and . DSD, page 779-786. IEEE Computer Society, (2008)Security Flaws in an Efficient Pseudo-Random Number Generator for Low-Power Environments., , , , and . SEWCN, volume 42 of Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering, page 25-35. Springer, (2009)Logic Restructuring for MUX-Based FPGAs., , , and . EUROMICRO, page 1161-. IEEE Computer Society, (1999)Theoretical comparison between sequential redundancy addition and removal and retiming optimization techniques., , , and . J. Syst. Archit., 49 (12-15): 529-541 (2003)A New TRNG Based on Coherent Sampling With Self-Timed Rings., , , and . IEEE Trans. Ind. Informatics, 12 (1): 91-100 (2016)Functional extension of structural logic optimization techniques., , , and . ASP-DAC, page 467-472. ACM, (2001)Dynamic control of entropy and power consumption in TRNGs for IoT applications., , and . IEICE Electron. Express, 15 (2): 20171157 (2018)Evaluating the computational performance of the Xilinx Ultrascale+ EG Heterogeneous MPSoC., , , , and . J. Supercomput., 77 (2): 2124-2137 (2021)