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Disambiguation of "Nakada, Takashi"

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A Minimal Roll-Back Based Recovery Scheme for Fault Toleration in Pipeline Processors.

, , , , , and . PRDC, page 237-238. IEEE Computer Society, (2010)

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Takashi Seki

Tatsuya Nakada

Takashi Iwata

Takashi Numaguchi

Takashi Tsuno

 

Other publications of authors with the same name

GPGPU Implementation of Variational Bayesian Gaussian Mixture Models., , and . CANDAR, page 185-190. IEEE, (2019)An Energy-Efficient Task Scheduling for Near-Realtime Systems with Execution Time Variation., , , , , and . IEICE Trans. Inf. Syst., 100-D (10): 2493-2504 (2017)An Energy-Efficient Task Scheduling for Near Real-Time Systems on Heterogeneous Multicore Processors., , , , , , and . IEICE Trans. Inf. Syst., 103-D (2): 329-338 (2020)A Minimal Roll-Back Based Recovery Scheme for Fault Toleration in Pipeline Processors., , , , , and . PRDC, page 237-238. IEEE Computer Society, (2010)D-MRAM cache: enhancing energy efficiency with 3T-1MTJ DRAM/MRAM hybrid memory., , , , , , , , and . DATE, page 1813-1818. EDA Consortium San Jose, CA, USA / ACM DL, (2013)An Accurate and Efficient Time-Division Parallelization of Cycle Accurate Architectural Simulators., , , and . Annual Simulation Symposium, page 247-255. IEEE Computer Society, (2007)Energy-aware task scheduling for near real-time periodic tasks on heterogeneous multicore processors., , , , , , and . VLSI-SoC, page 1-6. IEEE, (2017)An Instruction Mapping Scheme for FU Array Accelerator., , , , , and . IEICE Trans. Inf. Syst., 94-D (2): 286-297 (2011)A Runtime Optimization Selection Framework to Realize Energy Efficient Networks-on-Chip., , , , , and . IEICE Trans. Inf. Syst., 99-D (12): 2881-2890 (2016)Power capping of CPU-GPU heterogeneous systems through coordinating DVFS and task mapping., , , , and . ICCD, page 349-356. IEEE Computer Society, (2013)