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A Standard-Cell Based On-Chip NMOS and PMOS Performance Monitor for Process Variability Compensation., , , , and . IEICE Trans. Electron., 96-C (6): 894-902 (2013)A single-chip 802.11a MAC/PHY with a 32-b RISC processor., , , , , , and . IEEE J. Solid State Circuits, 38 (11): 2001-2009 (2003)Implementing and Evaluating E2LSH on Storage., , , , , , , and . EDBT, page 437-449. OpenProceedings.org, (2023)An area-efficient, standard-cell based on-chip NMOS and PMOS performance monitor for process variability compensation., , , , and . COOL Chips, page 1-3. IEEE Computer Society, (2012)Implementing and Evaluating E2LSH on Storage., , , , , , , and . CoRR, (2024)A 7uW deep-sleep, ultra low-power WLAN baseband LSI for mobile applications., , , , , , , , , and 4 other author(s). COOL Chips, page 1-3. IEEE Computer Society, (2011)Approaching DRAM performance by using microsecond-latency flash memory for small-sized random read accesses: a new access method and its graph applications., , , , , and . Proc. VLDB Endow., 14 (8): 1311-1324 (2021)GPU Graph Processing on CXL-Based Microsecond-Latency External Memory., , , , , , , , and . SC Workshops, page 961-972. ACM, (2023)