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Disambiguation of "Fujita, Tetsuya"

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A 7uW deep-sleep, ultra low-power WLAN baseband LSI for mobile applications.

, , , , , , , , , , , , , and . COOL Chips, page 1-3. IEEE Computer Society, (2011)

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Toko Fujita

Tetsuya Takahashi

Buntaro Fujita

Masayuki Fujita

Masakatsu Fujita

 

Other publications of authors with the same name

Improvement of Factor Model with Text Information Based on Factor Model Construction Process., , , and . IIMSS, volume 254 of Frontiers in Artificial Intelligence and Applications, page 222-230. IOS Press, (2013)A 40 nm 222 mW H.264 Full-HD Decoding, 25 Power Domains, 14-Core Application Processor With x512b Stacked DRAM., , , , , , , , , and 8 other author(s). IEEE J. Solid State Circuits, 46 (1): 32-41 (2011)A 60-mW MPEG4 video codec using clustered voltage scaling with variable supply-voltage scheme., , , , , , , , , and 8 other author(s). IEEE J. Solid State Circuits, 33 (11): 1772-1780 (1998)MASA: A Multithreaded Processor Architecture for Parallel Symbolic Computing., and . ISCA, page 443-451. IEEE Computer Society, (1988)A 222mW H.264 Full-HD decoding application processor with x512b stacked DRAM in 40nm., , , , , , , , , and 4 other author(s). ISSCC, page 326-327. IEEE, (2010)A single-chip 802.11a MAC/PHY with a 32-b RISC processor., , , , , , and . IEEE J. Solid State Circuits, 38 (11): 2001-2009 (2003)A 0.9-V, 150-MHz, 10-mW, 4 mm2, 2-D discrete cosine transform core processor with variable threshold-voltage (VT) scheme., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 31 (11): 1770-1779 (1996)A conditional clocking flip-flop for low power H.264/MPEG-4 audio/visual codec LSI., , , , , , , , , and 1 other author(s). CICC, page 527-530. IEEE, (2005)Capacitor-free level-sensitive active pull-down ECL circuit with self-adjusting driving capability., , , , , , , and . IEEE J. Solid State Circuits, 31 (6): 819-827 (1996)Substrate noise influence on circuit performance in variable threshold-voltage scheme., , , , , , and . ISLPED, page 309-312. IEEE, (1996)