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A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation of a Space Case Study.

, , , , , and . RTSS, page 207-217. IEEE Computer Society, (2014)

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A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation of a Space Case Study., , , , , and . RTSS, page 207-217. IEEE Computer Society, (2014)A reliable fault classifier for dependable systems on SRAM-based FPGAs., , , and . IOLTS, page 92-97. IEEE Computer Society, (2011)A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip., , , , and . DFT, page 132-141. IEEE Computer Society, (2007)Introduction to partial time composability for COTS multicores., , , , , , and . SAC, page 1955-1956. ACM, (2015)The future of embedded systems at ESA: Towards adaptability and reconfigurability., and . AHS, page 113-120. IEEE, (2011)Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs., , , , , and . IESS, volume 231 of IFIP Advances in Information and Communication Technology, page 179-192. Springer, (2007)AHRB: A high-performance time-composable AMBA AHB bus., , , , , and . RTAS, page 225-236. IEEE Computer Society, (2014)Contention-aware performance monitoring counte support for real-time MPSoCs., , , , , , , and . SIES, page 262-271. IEEE, (2016)Deconstructing bus access control policies for Real-Time multicores., , , , , and . SIES, page 31-38. IEEE, (2013)Data Bus Slicing for Contention-Free Multicore Real-Time Memory Systems., , , , , and . SIES, page 272-279. IEEE, (2016)