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A sub-0.85V, 6.4GBP/S/Pin TX-Interleaved Transceiver with Fast Wake-Up Time Using 2-Step Charging Control and VOHCalibration in 20NM DRAM Process.

, , , , , , , , , , , , , , , , , , , , , , , , , and . VLSI Circuits, page 147-148. IEEE, (2018)

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