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Disambiguation of "Großschädl, Johann"

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Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors.

, and . CHES, volume 4249 of Lecture Notes in Computer Science, page 270-284. Springer, (2006)

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Johann Pohany

Johann Bartha

Johann Bauer

Johann Bauer

Johann Bauer

 

Other publications of authors with the same name

Cryptanalysis of the Full AES Using GPU-Like Special-Purpose Hardware., and . IACR Cryptology ePrint Archive, (2011)Energy-Scalable Montgomery-Curve ECDH Key Exchange for ARM Cortex-M3 Microcontrollers., , , and . FiCloud Workshops, page 231-236. IEEE Computer Society, (2018)Optimized RISC Architecture for Multiple-Precision Modular Arithmetic., and . SPC, volume 2802 of Lecture Notes in Computer Science, page 253-270. Springer, (2003)Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors., and . CHES, volume 4249 of Lecture Notes in Computer Science, page 270-284. Springer, (2006)Full-Custom VLSI Design of a Unified Multiplier for Elliptic Curve Cryptography on RFID Tags.. Inscrypt, volume 6151 of Lecture Notes in Computer Science, page 366-382. Springer, (2009)VLSI Implementation of a Functional Unit to Accelerate ECC and AES on 32-Bit Processors., and . WAIFI, volume 4547 of Lecture Notes in Computer Science, page 40-54. Springer, (2007)Area, Delay, and Power Characteristics of Standard-Cell Implementations of the AES S-Box., , and . SAMOS, volume 4017 of Lecture Notes in Computer Science, page 457-466. Springer, (2006)AVRNTRU: Lightweight NTRU-based Post-Quantum Cryptography for 8-bit AVR Microcontrollers., , , and . DATE, page 1272-1277. IEEE, (2021)Alzette: A 64-Bit ARX-box - (Feat. CRAX and TRAX)., , , , , , , and . CRYPTO (3), volume 12172 of Lecture Notes in Computer Science, page 419-448. Springer, (2020)A Bit-Serial Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m).. CHES, volume 2162 of Lecture Notes in Computer Science, page 202-219. Springer, (2001)