Author of the publication

A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms.

, , , , and . DATE, page 247-252. IEEE Computer Society, (2004)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Designing Low Power Direct Digital Frequency Synthesizers., , , and . VLSI-SOC, page 105-110. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)Dynamic Data Type Optimization and Memory Assignment Methodologies., , , , , and . PATMOS, volume 5953 of Lecture Notes in Computer Science, page 175-185. Springer, (2009)Algorithmic and memory optimizations on multiple application mapping onto FPGAs., , , and . SAMOS, page 146-153. IEEE, (2017)Systematic Embedded Development and Implementation Techniques on Intel Myriad VPUs., , and . VLSI-SoC, page 1-2. IEEE, (2022)SDK4ED: One-click platform for Energy-aware, Maintainable and Dependable Applications., , , , , , , , , and 3 other author(s). DATE, page 981-986. IEEE, (2022)A low-cost fault tolerant solution targeting to commercial FPGA devices., and . AHS, page 46-53. IEEE, (2012)Quick_Hotspot: A Software Supported Methodology for Supporting Run-Time Thermal Analysis at MPSoC Designs., , and . ARCS Workshops, VDE-Verlag, (2011)Alternative Direct Digital Frequency Synthesizer architectures with reduced memory size., , , , and . ISCAS (2), page 73-76. IEEE, (2003)A methodology for implementing FIR filters and CAD tool development for designing RNS-based systems., , , , and . ISCAS (5), page 129-132. IEEE, (2003)A novel coarse-grain reconfigurable data-path for accelerating DSP kernels., , , , and . FPGA, page 252. ACM, (2004)