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Efficacy of Satisfiability-Based Attacks in the Presence of Circuit Reverse-Engineering Errors., , and . ISCAS, page 1-5. IEEE, (2020)DeePar-SCA: Breaking Parallel Architectures of Lattice Cryptography via Learning Based Side-Channel Attacks., , , , and . SAMOS, volume 12471 of Lecture Notes in Computer Science, page 262-280. Springer, (2020)Synthesis of on-chip control circuits for mVLSI biochips., , , , and . DATE, page 1799-1804. IEEE, (2017)SeqL+: Secure Scan-Obfuscation with Theoretical and Empirical Validation., , , , and . IACR Cryptol. ePrint Arch., (2021)Security of Microfluidic Biochip: Practical Attacks and Countermeasures., , and . ACM Trans. Design Autom. Electr. Syst., 25 (3): 27:1-27:29 (2020)Scalable Scan-Chain-Based Extraction of Neural Network Models., , and . DATE, page 1-6. IEEE, (2023)DP-fill: a dynamic programming approach to X-filling for minimizing peak test power in scan tests., , , , and . DATE, page 836-841. ACM, (2015)BioChipWork: Reverse Engineering of Microfluidic Biochips., , and . ICCD, page 9-16. IEEE Computer Society, (2017)LPScan: An algorithm for supply scaling and switching activity minimization during test., , , and . ICCD, page 463-466. IEEE Computer Society, (2013)Optimal Don't Care Filling for Minimizing Peak Toggles During At-Speed Stuck-At Testing., , , , and . ACM Trans. Design Autom. Electr. Syst., 23 (1): 5:1-5:26 (2017)