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Disambiguation of "Larsson-Edefors, Per"

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ASIC Design Exploration for DSP and FEC of 400-Gbit/s Coherent Data-Center Interconnect Receivers.

, , , , and . OFC, page 1-3. IEEE, (2020)

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Andreas Larsson

Willi Larsson

Emil Larsson

Joachim Larsson

Lars Larsson

 

Other publications of authors with the same name

Custom layout strategy for rectangle-shaped log-depth multiplier reduction tree., , , , , , and . ICECS, page 77-80. IEEE, (2009)Variable-Rate FEC Decoder VLSI Architecture for 400G Rate-Adaptive Optical Communication., , and . ICECS, page 45-48. IEEE, (2019)Time-domain interconnect characterisation flow for appropriate model segmentation., , and . IET Comput. Digit. Tech., 2 (4): 265-274 (2008)DSP-PP: A Simulator/Estimator of Power Consumption and Performance for Parallel DSP Architectures., , and . Applied Informatics, page 767-772. IASTED/ACTA Press, (2003)Manufacturable nanometer designs using standard cells with regular layout., and . ISQED, page 398-405. IEEE, (2013)Benchmarking of Carrier Phase Recovery Circuits for M-QAM Coherent Systems., and . OFC, page 1-3. IEEE, (2021)Fiber-on-Chip: Digital FPGA Emulation of Channel Impairments for Real-Time Evaluation of DSP., and . OFC, page 1-3. IEEE, (2022)GLMC: interconnect length estimation by growth-limited multifold clustering., , and . ISCAS, page 465-468. IEEE, (2000)Energy-Efficient Soft-Assisted Product Decoders., , , , and . OFC, page 1-3. IEEE, (2019)Improved Low-Power LDPC FEC for Coherent Optical Systems., , and . ECOC, page 1-3. IEEE, (2017)