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Disambiguation of "Verbruggen, Bob"

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16.3 A 330mW 14b 6.8GS/s dual-mode RF DAC in 16nm FinFET achieving -70.8dBc ACPR in a 20MHz channel at 5.2GHz.

, , , , , , , , , , , , and . ISSCC, page 280-281. IEEE, (2017)

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Paul Verbruggen

RNA polymerase II inhibition by the La Crosse virus non-structural protein NSs as a mechanism to suppress antiviral responses. Uni Freiburg, (2010)

Nicole Verbruggen

Jonathan Bob

Bob Svendsen

Bob Eves

 

Other publications of authors with the same name

A 2.6mW 6b 2.2GS/s 4-times interleaved fully dynamic pipelined ADC in 40nm digital CMOS., , , , and . ISSCC, page 296-297. IEEE, (2010)A complementary dynamic residue amplifier for a 67 dB SNDR 1.36 mW 170 MS/s pipelined SAR ADC., , , , , and . ESSCIRC, page 215-218. IEEE, (2014)The Potential of FinFETs for Analog and RF Circuit Applications., , , , , , , , , and 5 other author(s). IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (11): 2541-2551 (2007)Session 28 overview: Hybrid ADCs., , and . ISSCC, page 464-465. IEEE, (2017)A programmable RFSoC in 16nm FinFET technology for wideband communications., , , , , , , , , and 5 other author(s). A-SSCC, page 1-4. IEEE, (2017)A 70 dB SNDR 200 MS/s 2.3 mW dynamic pipelined SAR ADC in 28nm digital CMOS., , , and . VLSIC, page 1-2. IEEE, (2014)A 2.2mW 5b 1.75GS/s Folding Flash ADC in 90nm Digital CMOS., , , , and . ISSCC, page 252-253. IEEE, (2008)A 70dB DR 10b 0-to-80MS/s current-integrating SAR ADC with adaptive dynamic range., , , , and . ISSCC, page 470-472. IEEE, (2012)A 13Bit 5GS/S ADC with Time-Interleaved Chopping Calibration in 16NM FinFET., , , , , , , , , and 10 other author(s). VLSI Circuits, page 99-100. IEEE, (2018)High-speed analog-to-digital converters in downscaled CMOS., , , and . ICICDT, page 1-4. IEEE, (2015)