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A 26.9 K 314.5 Mb/s Soft (32400, 32208) BCH Decoder Chip for DVB-S2 System.

, , , and . IEEE J. Solid State Circuits, 45 (11): 2330-2340 (2010)

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Deconstructing mobile commerce service with continuance intention., and . IJMC, 6 (1): 67-87 (2008)A 26.9 K 314.5 Mb/s Soft (32400, 32208) BCH Decoder Chip for DVB-S2 System., , , and . IEEE J. Solid State Circuits, 45 (11): 2330-2340 (2010)An improved soft BCH decoder with one extra error compensation., , and . ISCAS, page 3941-3944. IEEE, (2010)A fully parallel BCH codec with double error correcting capability for NOR flash applications., , , and . ICASSP, page 1605-1608. IEEE, (2012)A hybrid forecast marketing timing model based on probabilistic neural network, rough set and C4.5., , and . Expert Syst. Appl., 37 (3): 1814-1820 (2010)A 2.56 Gb/s Soft RS (255, 239) Decoder Chip for Optical Communication Systems., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (7): 2110-2118 (2014)A MPCN-Based Parallel Architecture in BCH Decoders for nand Flash Memory Devices., , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 58-II (10): 682-686 (2011)A 2.56 Gb/s soft RS (255, 239) decoder chip for optical communication systems., , , and . ESSCIRC, page 79-82. IEEE, (2011)An MPCN-Based BCH Codec Architecture With Arbitrary Error Correcting Capability., , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (7): 1235-1244 (2015)Improved High Code-Rate Soft BCH Decoder Architectures With One Extra Error Compensation., , and . IEEE Trans. Very Large Scale Integr. Syst., 21 (11): 2160-2164 (2013)