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Compiling Permutations for Superconducting QPUs., , , and . DATE, page 1349-1354. IEEE, (2019)Improvements to boolean resynthesis., , , , , , , and . DATE, page 755-760. IEEE, (2018)Integrated ESOP Refactoring for Industrial Designs., , , , , and . ICECS, page 369-372. IEEE, (2018)SAT-Based Exact Synthesis: Encodings, Topology Families, and Parallelism., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (4): 871-884 (2020)A Logic Synthesis Toolbox for Reducing the Multiplicative Complexity in Logic Networks., , , , and . IACR Cryptol. ePrint Arch., (2020)Exact Synthesis of Boolean Functions in Majority-of-Five Forms., , , , , and . ISCAS, page 1-5. IEEE, (2019)An adaptive prioritized ε-preferred evolutionary algorithm for approximate BDD optimization., , , and . GECCO, page 1232-1239. ACM, (2017)Automatic Uniform Quantum State Preparation Using Decision Diagrams., , , and . ISMVL, page 170-175. IEEE, (2020)Structural rewriting in XOR-majority graphs., , , , and . ASP-DAC, page 663-668. ACM, (2019)The Role of Multiplicative Complexity in Compiling Low $T$-count Oracle Circuits., , , , and . ICCAD, page 1-8. ACM, (2019)