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Technique based on On-Chip Current Sensors and Neighbourhood Comparison Logic to detect resistive-open defects in SRAMs.

, , , , and . LATW, page 1-6. IEEE Computer Society, (2013)

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Enabling concurrent clock and power gating in an industrial design flow., , , , and . DATE, page 334-339. IEEE, (2009)A software-based methodology for the generation of peripheral test sets based on high-level descriptions., , and . SBCCI, page 348-353. ACM, (2007)Towards a transmission power self-optimization in reliable Wireless Sensor Networks., , , , , and . LATW, page 1-3. IEEE, (2010)An intellectual property core to detect task schedulling-related faults in RTOS-based embedded systems., , and . IOLTS, page 19-24. IEEE Computer Society, (2011)Software-Based On-Line Test of Communication Peripherals in Processor-Based Systems for Automotive Applications., , , , , and . MTV, page 3-8. IEEE Computer Society, (2006)Evaluating a Transmission Power Self-Optimization Technique for WSN in EMI Environments., , , , , , , and . DSD, page 509-515. IEEE Computer Society, (2010)Extended Fault Detection Techniques for Systems-on-Chip., , and . DDECS, page 55-60. IEEE Computer Society, (2007)Coupling EA and high-level metrics for the automatic generation of test blocks for peripheral cores., , , and . GECCO, page 1912-1919. ACM, (2007)Hierarchical Memory Diagnosis., , , , , and . ETS, page 1-2. IEEE, (2022)An Integrated Approach for Increasing the Soft-Error Detection Capabilities in SoCs processors., , , , and . DFT, page 445-453. IEEE Computer Society, (2005)