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Disambiguation of "Ravikumar, C. P."

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A Polynomial-Time Algorithm for Power Constrained Testing of Core Based Systems.

, , and . Asian Test Symposium, page 107-112. IEEE Computer Society, (1999)

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Guido C C Clinckspoor

Thomas C C Knöbig

Guido C C Clinckspoor

Ullrich C C Jagstaidt

Thomas C C Gartenmann

 

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Measuring the Quality of Web Search Results., and . JCIS, page 324-328. JCIS / Association for Intelligent Machinery, Inc., (2002)Solving VLSI physical design problems on a vector machine.. Comput. Aided Des., 25 (1): 49-57 (1993)Interval partition with bounded overlap.. Comput. Aided Des., 24 (8): 405-410 (1992)An Architecture for CSP and Its Simulation., and . ICPP, page 874-881. Pennsylvania State University Press, (1987)Leakage Power Estimation for Deep Submicron Circuits in an ASIC Design Environment., and . ASP-DAC/VLSI Design, page 45-50. IEEE Computer Society, (2002)An Euler Path Based Technique for Deadlock-free Multicasting., and . ICPP, page 378-384. IEEE Computer Society, (1997)A Graph-Theoretic Approach for Register File Based Synthesis., , and . VLSI Design, page 118-123. IEEE Computer Society, (1997)Reducing SoC Test Time and Test Power in Hierarchical Scan Test : Scan Architecture and Algorithms., , and . VLSI Design, page 351-356. IEEE Computer Society, (2007)Simultaneous Module Selection and Scheduling for Power-Constrained Testing of Core Based Systems., , and . VLSI Design, page 462-467. IEEE Computer Society, (2000)Software Power Optimizations In An Embedded System., and . VLSI Design, page 254-. IEEE Computer Society, (2001)