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Другие публикации лиц с тем же именем

Fault-Secure Parity Prediction Booth Multipliers., и . IEEE Des. Test Comput., 16 (3): 90-101 (1999)Embedded Robustness IPs for Transient-Error-Free ICs., , и . IEEE Des. Test Comput., 19 (3): 56-70 (2002)Low-power memory repair for high defect densities., и . IOLTS, стр. 171-173. IEEE, (2015)Rout3D: A lightweight adaptive routing algorithm for tolerating faulty vertical links in 3D-NoCs., , , и . ETS, стр. 1-6. IEEE, (2017)Design of Static CMOS Self-Checking Circuits using Built-In Current Sensing., , и . FTCS, стр. 104-111. IEEE Computer Society, (1992)Towards a holistic CAD platform for nanotechnologies., и . Microelectron. J., 39 (8): 1032-1040 (2008)Iterative Diagnosis Approach for ECC-Based Memory Repair., и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39 (2): 464-477 (2020)Fault-tolerant adaptive routing under an unconstrained set of node and link failures for many-core systems-on-chip., , , , , и . Microprocess. Microsystems, 38 (6): 620-635 (2014)Programmable memory BIST., , , и . ITC, стр. 10. IEEE Computer Society, (2005)Congestion-Aware Adaptive Routing in 2D-Mesh Multicores., , и . NCA, стр. 50-58. IEEE Computer Society, (2014)