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From low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis.

J. Andrade, N. George, K. Karras, D. Novo, V. da Silva, P. Ienne, and G. Fernandes. FPL, page 1-8. IEEE, (2015)

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Márcio Antônio de Paiva

César Paiva

Rodrigo Paiva

Antônio Firmino Paiva

Pedro Paiva Brito

Other publications of authors with the same name

Real-time HD image distortion correction in heterogeneous parallel computing systems using efficient memory access patterns.R. Melo, G. Fernandes, and J. Barreto. J. Real-Time Image Processing, 11 (1): 83-91 (2016)Scalable and parallel codec architectures for the DVB-S2 FEC system.M. Gomes, G. Fernandes, V. da Silva, V. Ferreira, A. Sengo, L. Silva, N. Marques, and M. Falcão. APCCAS, page 1506-1509. IEEE, (2008)Parallel LDPC Decoding on the Cell/B.E. Processor.G. Fernandes, L. Sousa, V. da Silva, and J. Marinho. HiPEAC, volume 5409 of Lecture Notes in Computer Science, page 389-403. Springer, (2009)Configurable M-factor VLSI DVB-S2 LDPC decoder architecture with optimized memory tiling design.G. Fernandes, M. Gomes, V. da Silva, L. Sousa, and J. Cacheira. EURASIP J. Wireless Comm. and Networking, (2012)Flexible non-binary LDPC decoding on FPGAs.J. Andrade, G. Fernandes, V. da Silva, and K. Kasai. ICASSP, page 1936-1940. IEEE, (2014)How GPUs can outperform ASICs for fast LDPC decoding.G. Fernandes, V. da Silva, and L. Sousa. ICS, page 390-399. ACM, (2009)HDL Library of Processing Units for Generic and DVB-S2 LDPC Decoding.M. Gomes, G. Fernandes, J. Gonçalves, V. da Silva, M. Falcão, and P. Faia. SIGMAP, page 17-24. INSTICC Press, (2006)Flexible Parallel Architecture for DVB-S2 LDPC Decoders.M. Gomes, G. Fernandes, V. da Silva, V. Ferreira, A. Sengo, and M. Falcão. GLOBECOM, page 3265-3269. IEEE, (2007)Optimized Fast Walsh-Hadamard Transform on GPUs for non-binary LDPC decoding.J. Andrade, G. Fernandes, and V. da Silva. Parallel Comput., 40 (9): 449-453 (2014)Exploiting Compute Caches for Memory Bound Vector Operations.J. Vieira, N. Roma, P. Tomás, P. Ienne, and G. Fernandes. SBAC-PAD, page 197-200. IEEE, (2018)

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Disambiguation of "Fernandes, Gabriel Falcão Paiva"

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From low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis.

Please choose a person to relate this publication to

Márcio Antônio de Paiva

César Paiva

Rodrigo Paiva

Antônio Firmino Paiva

Pedro Paiva Brito

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Fernandes, Gabriel Falcão Paiva"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML From low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis.

Please choose a person to relate this publication to

Márcio Antônio de Paiva

César Paiva

Rodrigo Paiva

Antônio Firmino Paiva

Pedro Paiva Brito

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

From low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis.