( en | de | ru )

 

Disambiguation of "Kajihara, Nobuki"

Author of the publication

copydeleteadd this publication to your clipboard
A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI.

, , , , , , , , , , and . ICES, volume 1478 of Lecture Notes in Computer Science, page 1-12. Springer, (1998)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

No persons found for author name Kajihara, Nobuki
add a person with the name Kajihara, Nobuki
 

Other publications of authors with the same name

An Evolvable Hardware Chip and Its Application as a Multi-Function Prosthetic Hand Controller., , , , and . AAAI/IAAI, page 182-187. AAAI Press / The MIT Press, (1999)Implementation of a Gate-Level Evolvable Hardware Chip., , , , and . ICES, volume 2210 of Lecture Notes in Computer Science, page 38-49. Springer, (2001)SOP: a reconfigurable massively parallel system and its control-data-flow based compiling method., , and . FCCM, page 148-156. IEEE, (1996)A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI., , , , , , , , , and 1 other author(s). ICES, volume 1478 of Lecture Notes in Computer Science, page 1-12. Springer, (1998)Evolvable Hardware Chip for High Precision Printer Image Compression., , , , , , , and . AAAI/IAAI, page 486-491. AAAI Press / The MIT Press, (1998)FPGA Implementation for Large Scale Reservoir Computing based on Chaotic Boltzmann Machine., , , and . ISCAS, page 1-5. IEEE, (2024)Evolvable Hardware Chips for Neural Network Applications., , , , , and . ICANNGA, page 127-134. Springer, (1999)Arithmetic Operation Oriented Reconfigurable Chip: RHW., , , and . FPL, volume 2147 of Lecture Notes in Computer Science, page 618-622. Springer, (2001)Real-world applications of analog and digital evolvable hardware ., , , , , , , , , and 1 other author(s). IEEE Trans. Evol. Comput., 3 (3): 220-235 (1999)Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW., , , and . FCCM, page 281-282. IEEE Computer Society, (2000)