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Tag Overflow Buffering: Reducing Total Memory Energy by Reduced-Tag Matching.

, , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (5): 728-732 (2009)

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Energy-optimal synchronization primitives for single-chip multi-processors., , , and . ACM Great Lakes Symposium on VLSI, page 141-144. ACM, (2009)Architectural Leakage Power Minimization of Scratchpad Memories by Application-Driven Subbanking., , , and . IEEE Trans. Computers, 59 (7): 891-904 (2010)Analyzing On-Chip Communication in a MPSoC Environment., , , , and . DATE, page 752-757. IEEE Computer Society, (2004)Energy/Lifetime Cooptimization by Cache Partitioning With Graceful Performance Degradation., , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (8): 1705-1715 (2014)Reducing the Spike Rate in Deep Spiking Neural Networks., , and . ICONS, page 8:1-8:8. ACM, (2022)ISS-centric modular HW/SW co-simulation., , , and . ACM Great Lakes Symposium on VLSI, page 31-36. ACM, (2006)Analyzing Power Consumption of Message Passing Primitives in a Single-Chip Multiprocessor., , and . ICCD, page 393-396. IEEE Computer Society, (2004)Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation., , , , , and . DATE, page 798-803. IEEE Computer Society, (2005)Energy-optimal caches with guaranteed lifetime., , , , and . ISLPED, page 141-146. ACM, (2012)Firefly-Inspired Synchronization of Sensor Networks with Variable Period Lengths., , and . ICANNGA, volume 7824 of Lecture Notes in Computer Science, page 376-385. Springer, (2013)