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Disambiguation of "Fazeli, Mahdi"

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High output hamming-distance achievement by a greedy logic masking approach.

, , , , , and . EWDTS, page 1-4. IEEE Computer Society, (2016)

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Abolfath Fazeli

Shahla Mahdizadeh

Gholamreza Fazeli

Walid Fazeli

Nadja Mahdi

 

Other publications of authors with the same name

Micro-architectural approach to the efficient employment of STTRAM cells in a microprocessor register file., , , and . IET Comput. Digit. Tech., 11 (1): 1-7 (2017)Coding Last Level STT-RAM Cache for High Endurance and Low Power., , , and . IEEE Comput. Archit. Lett., 13 (2): 73-76 (2014)An Efficient Programming Skeleton for Clusters of Multi-Core Processors., , and . Int. J. Parallel Program., 46 (6): 1094-1109 (2018)Vulnerability modelling of crypto-chips against scan-based attacks., , and . IET Inf. Secur., 12 (6): 543-550 (2018)Experimental Evaluation of Delayed-Based Detectors Against Power-off Attack., , , , , , , , and . IOLTS, page 1-3. IEEE, (2023)Parallel Clustering on the Star Graph., , and . ICA3PP, volume 3719 of Lecture Notes in Computer Science, page 287-292. Springer, (2005)An In-Depth Vulnerability Analysis of RISC-V Micro-Architecture Against Fault Injection Attack., , , , , and . DFT, page 1-6. IEEE, (2021)A Power Efficient Masking Technique for Design of Robust Embedded Systems against SEUs and SET., and . DFT, page 193-201. IEEE Computer Society, (2008)Energy aware and reliable STT-RAM based cache design for 3D embedded chip-multiprocessors., , , , and . ReCoSoC, page 1-8. IEEE, (2017)An energy efficient circuit level technique to protect register file from MBUs and SETs in embedded processors., , and . DSN, page 195-204. IEEE Computer Society, (2009)