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Learning early-stage platform dimensioning from late-stage timing verification.

, , and . DATE, page 851-857. IEEE, (2009)

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An approach for physical topology exploration in wired bus networks., , and . ISCAS, page 205-208. IEEE, (2015)Hardware-Software Cosynthesis for Microcontrollers., , and . IEEE Des. Test Comput., 10 (4): 64-75 (1993)On the Relation between Programming Models, Computational/Execution Models and Software Platforms in Automotive, , , , , , , , , and 1 other author(s). Future Automotive HW/SW Platform Design, volume 9 of Dagstuhl Reports, Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik, (January 2020)Benchmarking Efforts for Future HW/SW Platforms, , , , , , , , , and 7 other author(s). Future Automotive HW/SW Platform Design, volume 9 of Dagstuhl Reports, Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik, (January 2020)Modelling and designing reliable on-chip-communication devices in MPSoCs with real-time requirements., and . ETFA, page 1465-1472. IEEE, (2008)Safety, Efficiency and Autonomy - Mastering Conflicting Trends in Embedded Systems Design.. DIPES/BICC, volume 329 of IFIP Advances in Information and Communication Technology, page 5-6. Springer, (2010)From Model to Requirements: Pattern-Based Analysis in Distributed Development of Embedded Systems., , and . IESS, volume 184 of IFIP, page 35-44. Springer, (2005)Failure analysis of a network-on-chip for real-time mixed-critical systems., , , , and . DATE, page 1-4. European Design and Automation Association, (2014)Zero-time communication for automotive multi-core systems under SPP scheduling., , and . ETFA, page 1-9. IEEE, (2016)Cross-layer dependency analysis with timing dependence graphs., and . DAC, page 99:1-99:6. ACM, (2018)