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Accelerating the Inference Phase in Ternary Convolutional Neural Networks Using Configurable Processors., , , и . DASIP, стр. 94-99. IEEE, (2018)An FPGA Overlay Architecture for Cost Effective Regular Expression Search (Abstract Only)., , и . FPGA, стр. 287-288. ACM, (2017)Module-per-Object: A Human-Driven Methodology for C++-Based High-Level Synthesis Design., , и . FCCM, стр. 218-226. IEEE, (2019)Accuracy-aware processor customisation for fixed-point arithmetic., , и . IET Comput. Digit. Tech., 10 (1): 1-11 (2016)Asymmetric large size multipliers with optimised FPGA resource utilisation., , , и . IET Comput. Digit. Tech., 6 (6): 372-383 (2012)Extern Objects in P4: an ROHC Compression Case Study., , , и . CoRR, (2016)Polyphase Filter Approach for High Performance, FPGA-Based Quadrature Demodulation., , и . VLSI Signal Processing, 32 (3): 237-254 (2002)Designing customized microprocessors for fixed-point computation., , и . AHS, стр. 1. IEEE, (2015)Heterogeneous Distributed SRAM Configuration for Energy-Efficient Deep CNN Accelerators., , и . NEWCAS, стр. 287-290. IEEE, (2020)Body temperature estimation of a moving subject from thermographic images., , , , , , и . Mach. Vis. Appl., 23 (2): 299-311 (2012)