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Design and Testing of Millimeter-Wave/Subterahertz Circuits and Systems.. IEEE Des. Test, 31 (6): 4-5 (2014)Modeling and Evaluating Errors Due to Random Clock Shifts in Quantum-Dot Cellular Automata Circuits., , , , , , and . J. Electron. Test., 25 (1): 55-66 (2009)T2B: Carbon nanotubes and opportunities for wireless on-chip interconnect., , and . SoCC, page xxxix-xli. IEEE, (2014)A new decompressor with ordered parallel scan design for reduction of test data and test time., , , and . ISCAS, page 641-644. IEEE, (2015)Testability Measures : What Do They Do for ATPG ?, and . ITC, page 129-139. IEEE Computer Society, (1986)Gerabaldi: A Temporal Simulator for Probabilistic IC Degradation and Failure Processes., and . VTS, page 1-7. IEEE, (2023)Effect of traffic localization on energy dissipation in NoC-based interconnect., , , , and . ISCAS (2), page 1774-1777. IEEE, (2005)Analog IP design flow for SoC applications., , , and . ISCAS (4), page 676-679. IEEE, (2003)Ring oscillators for functional and delay test of latches and flip-flops., , , and . SBCCI, page 67-72. ACM, (2011)Performance and functional test of flip-flops using ring oscillator structure., , and . IDT, page 42-47. IEEE, (2011)