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Low-Cost and Highly Robust Quadruple Node Upset Tolerant Latch Design.

L. Hao, Y. Wang, Y. Liu, S. Zhao, X. Zhang, Y. Li, W. Lu, C. Peng, Q. Zhao, Y. Zhou, C. Dai, Z. Lin, and X. Wu. IEEE Trans. Very Large Scale Integr. Syst., 32 (5): 883-896 (May 2024)

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Yongliang Huang

Zhou Zhou

Yayun Zhou

Yaming Zhou

Other publications of authors with the same name

Rank-two residue iteration method for nonnegative matrix factorization.H. Liu, and Y. Zhou. Neurocomputing, 74 (17): 3305-3312 (2011)Ultra8T: A Sub-Threshold 8T SRAM with Leakage Detection.S. Shen, H. Xu, Y. Zhou, M. Ling, and W. Yu. CoRR, (2023)Soft-Error-Immune Quadruple-Node-Upset Tolerant Latch Based on Polarity Design and Source-Isolation Technologies.L. Hao, X. Zhang, C. Dai, Q. Zhao, W. Lu, C. Peng, Y. Zhou, Z. Lin, and X. Wu. IEEE Trans. Very Large Scale Integr. Syst., 32 (4): 597-608 (April 2024)ShareFloat CIM: A Compute-In-Memory Architecture with Floating-Point Multiply-and-Accumulate Operations.A. Guo, Y. Zhou, B. Wang, T. Xiong, C. Xue, Y. Wang, X. Si, and J. Yang. ISCAS, page 2276-2280. IEEE, (2022)Toward Energy-Efficient STT-MRAM Design With Multi-Modes Reconfiguration.H. Cai, J. Chen, Y. Zhou, and W. Zhao. IEEE Trans. Circuits Syst. II Express Briefs, 68 (7): 2633-2639 (2021)A Single-Ended Offset-Canceling Sense Amplifier Enabling Wide-Voltage Operations.S. Shen, H. Xu, Y. Zhou, and W. Yu. IEEE Trans. Circuits Syst. II Express Briefs, 70 (3): 1139-1143 (March 2023)A survey of in-spin transfer torque MRAM computing.H. Cai, B. Liu, J. Chen, L. Naviner, Y. Zhou, Z. Wang, and J. Yang. Sci. China Inf. Sci., (2021)A 28nm Horizontal-Weight-Shift and Vertical-feature-Shift-Based Separate-WL 6T-SRAM Computation-in-Memory Unit-Macro for Edge Depthwise Neural-Networks.B. Wang, C. Xue, Z. Feng, Z. Zhang, H. Liu, L. Ren, X. Li, A. Yin, T. Xiong, Y. Xue and 6 other author(s). ISSCC, page 134-135. IEEE, (2023)Design Methodology towards High-Precision SRAM based Computation-in-Memory for AI Edge Devices.T. Xiong, Y. Zhou, Y. Kong, B. Wang, A. Guo, Y. Wang, C. Xue, H. Hsu, X. Si, and J. Yang. ISOCC, page 195-196. IEEE, (2021)Analysis of how to use the GEB developing.N. Wei, and Y. Zhou. ICEE, page 3723-3725. IEEE Computer Society, (2010)

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Disambiguation of "Zhou, Yongliang"

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Low-Cost and Highly Robust Quadruple Node Upset Tolerant Latch Design.

Please choose a person to relate this publication to

Yongliang Huang

Zhou Zhou

Zhou Zhou

Yayun Zhou

Yaming Zhou

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Zhou, Yongliang"

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Low-Cost and Highly Robust Quadruple Node Upset Tolerant Latch Design.

Please choose a person to relate this publication to

Yongliang Huang

Zhou Zhou

Zhou Zhou

Yayun Zhou

Yaming Zhou

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
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MSOffice XML

Low-Cost and Highly Robust Quadruple Node Upset Tolerant Latch Design.