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Disambiguation of "Nam, Byeong-Gyu"

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Session 2 overview: Processors: Digital architectures and systems subcommittee.

, , and . ISSCC, page 32-33. IEEE, (2018)

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Byeong-Gyu Choi

Rolf Gyufko

Andrea Gyulai-Schmidt

Agnes Gyulay

Adam Gyürki Kis

 

Other publications of authors with the same name

A high-throughput 16× super resolution processor for real-time object recognition SoC., , and . ESSCIRC, page 259-262. IEEE, (2013)Session 2 overview: Processors: Digital architectures and systems subcommittee., , and . ISSCC, page 32-33. IEEE, (2018)Highlights of the ISSCC 2013 Processors and High Performance Digital Sessions., , , , and . IEEE J. Solid State Circuits, 49 (1): 4-8 (2014)A Low-Power Unified Arithmetic Unit for Programmable Handheld 3-D Graphics Systems., , and . CICC, page 535-538. IEEE, (2006)A fixed-point 3D graphics library with energy-efficient cache architecture for mobile multimedia systems., , , , , , and . ISCAS (5), page 4602-4605. IEEE, (2005)A 57 mW 12.5 µJ/Epoch Embedded Mixed-Mode Neuro-Fuzzy Processor for Mobile Real-Time Object Recognition., , , and . IEEE J. Solid State Circuits, 48 (11): 2894-2907 (2013)Intelligent Network-on-Chip With Online Reinforcement Learning for Portable HD Object Recognition Processor., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (2): 476-484 (2014)A Power Management Unit with Continuous Co-Locking of Clock Frequency and Supply Voltage for Dynamic Voltage and Frequency Scaling., , , , and . ISCAS, page 2112-2115. IEEE, (2007)Session 14 overview: Deep-learning processors., , and . ISSCC, page 236-237. IEEE, (2017)Session 3 overview: Digital processors., , and . ISSCC, page 48-49. IEEE, (2017)