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Disambiguation of "Basu, Arindam"

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ANN vs SNN: A case study for Neural Decoding in Implantable Brain-Machine Interfaces.

, , and . CoRR, (2023)

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Arindam Chatterjee

Arindam Khan

Ananda Basu

Sumit Basu

Ratna Basu

 

Other publications of authors with the same name

Robust doublet STDP in a floating-gate synapse., and . IJCNN, page 4296-4301. IEEE, (2014)Hardware and software infrastructure for a family of floating-gate based FPAAs., , , , , , , , and . ISCAS, page 2794-2797. IEEE, (2010)A 0.11-0.38 pJ/cycle Differential Ring Oscillator in 65 nm CMOS for Robust Neurocomputing., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 68 (2): 617-630 (2021)Guest Editorial Low-Power, Adaptive Neuromorphic Systems: Devices, Circuit, Architectures and Algorithms., , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 8 (1): 1-5 (2018)Introducing Recurrence in Strong PUFs for Enhanced Machine Learning Attack Resistance., , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 11 (2): 319-332 (2021)Design and Development of Standards (HL7 V3) Based Enterprise Architecture for Public Health Programs Integration at the County of Los Angeles., , , , , and . Int. J. Heal. Inf. Syst. Informatics, 2 (2): 53-66 (2007)Hardware-Amenable Structural Learning for Spike-Based Pattern Classification Using a Simple Model of Active Dendrites., , and . Neural Comput., 27 (4): 845-897 (2015)Power-efficient Spike Sorting Scheme Using Analog Spiking Neural Network Classifier., , , , and . ACM J. Emerg. Technol. Comput. Syst., 17 (2): 12:1-12:29 (2021)Prospects for Analog Circuits in Deep Networks., , and . CoRR, (2021)Hardware architecture for large parallel array of Random Feature Extractors applied to image recognition., , , and . Neurocomputing, (2017)