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Using adder and subtractor compressors to sum of absolute transformed differences architecture for low-power video encoding.

, , , , , , , and . ICECS, page 490-493. IEEE, (2017)

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Using adder and subtractor compressors to sum of absolute transformed differences architecture for low-power video encoding., , , , , , , and . ICECS, page 490-493. IEEE, (2017)A framework for designing power-efficient inference accelerators in tree-based learning applications., , and . Eng. Appl. Artif. Intell., (2022)Low-Power HEVC 8-point 2-D Discrete Cosine Transform Hardware Using Adder Compressors., , , , , , and . NEWCAS, page 309-312. IEEE, (2018)Exploring Motion Vector Cost with Partial Distortion Elimination in Sum of Absolute Differences for HEVC Integer Motion Estimation., , , , , , and . NEWCAS, page 1-4. IEEE, (2019)Exploiting absolute arithmetic for power-efficient sum of absolute differences., , , , , , and . ICECS, page 522-525. IEEE, (2017)A Framework for Crossing Temperature-Induced Timing Errors Underlying Hardware Accelerators to the Algorithm and Application Layers., , , , , , and . IEEE Trans. Computers, 71 (2): 349-363 (2022)Power-Efficient Sum of Absolute Differences Hardware Architecture Using Adder Compressors for Integer Motion Estimation Design., , , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 64-I (12): 3126-3137 (2017)Quality and Complexity Assessment of Learning-Based Image Compression Solutions., , , and . ICIP, page 599-603. IEEE, (2021)Exploiting Partial Distortion Elimination in the Sum of Absolute Differences for Energy-Efficient HEVC Integer Motion Estimation., , , , , , and . SBCCI, page 1-6. IEEE, (2018)C2PAx: Complexity-Aware Constant Parameter Approximation for Energy-Efficient Tree-Based Machine Learning Accelerators., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 69 (7): 2683-2693 (2022)