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System Level Approaches for Mitigation of Long Duration Transient Faults in Future Technologies.

, , and . ETS, page 165-172. IEEE Computer Society, (2007)

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New Challenges for Designers of Fault Tolerant Embedded Systems Based on Future Technologies., and . IESS, volume 310 of IFIP Advances in Information and Communication Technology, page 312-313. Springer, (2009)Reliability aware yield improvement technique for nanotechnology based circuits., , , , and . SBCCI, ACM, (2009)Single element correction in sorting algorithms with minimum delay overhead., , , and . LATW, page 1-6. IEEE, (2009)Increasing memory yield in future technologies through innovative design., , , , and . ISQED, page 622-626. IEEE Computer Society, (2009)Using Memory to Cope with Simultaneous Transient Faults., , and . LATW, page 151-156. IEEE, (2006)Using built-in sensors to cope with long duration transient faults in future technologies., , , , and . ITC, page 1-10. IEEE Computer Society, (2007)XOR-based Low Cost Checkers for Combinational Logic., and . DFT, page 281-289. IEEE Computer Society, (2008)A fast error correction technique for matrix multiplication algorithms., , , and . IOLTS, page 133-137. IEEE Computer Society, (2009)Multiple Bit Error Detection and Correction in Memory., , , , and . DSD, page 652-657. IEEE Computer Society, (2010)Majority Logic Mapping for Soft Error Dependability., , , and . J. Electron. Test., 24 (1-3): 83-92 (2008)