( en | de | ru )

 

Disambiguation of "Zhang, Zhengya"

Author of the publication

copydeleteadd this publication to your clipboard
TAICHI: A Tiled Architecture for In-Memory Computing and Heterogeneous Integration.

, , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 69 (2): 559-563 (2022)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Zhengya Yu

Zhang Zhang

Meng Zhang

Methods and implementations of road-network matching. TU München, (2009)

Shuying Zhang

Yue Zhang

 

Other publications of authors with the same name

An FPGA-based transient error simulator for evaluating resilient system designs (abstract only)., , and . FPGA, page 271. ACM, (2013)A 2.4-mm2 130-mW MMSE-Nonbinary LDPC Iterative Detector Decoder for 4×4 256-QAM MIMO in 65-nm CMOS., , and . IEEE J. Solid State Circuits, 54 (7): 2070-2080 (2019)A Maximum-Likelihood Sequence Detection Powered ADC-Based Serial Link., , , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (7): 2269-2278 (2018)A Configurable Successive-Cancellation List Polar Decoder Using Split-Tree Architecture., , and . IEEE J. Solid State Circuits, 56 (2): 612-623 (2021)VOTA: A Heterogeneous Multicore Visual Object Tracking Accelerator Using Correlation Filters., , , , , and . IEEE J. Solid State Circuits, 57 (11): 3490-3502 (2022)An Injectable 64 nW ECG Mixed-Signal SoC in 65 nm for Arrhythmia Monitoring., , , , , , , , , and 3 other author(s). IEEE J. Solid State Circuits, 50 (1): 375-390 (2015)SNAP: An Efficient Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference., , , , , and . IEEE J. Solid State Circuits, 56 (2): 636-647 (2021)TT-CIM: Tensor Train Decomposition for Neural Network in RRAM-Based Compute-in-Memory Systems., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 71 (3): 1172-1183 (March 2024)A 0.23mW Heterogeneous Deep-Learning Processor Supporting Dynamic Execution of Conditional Neural Networks., , and . ESSCIRC, page 162-165. IEEE, (2018)Memristive devices for stochastic computing., , , and . ISCAS, page 2592-2595. IEEE, (2014)