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A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array Technology., , , , , , , , , and 42 other author(s). ISSCC, page 218-220. IEEE, (2019)Speech Segmentation Optimization using Segmented Bilingual Speech Corpus for End-to-end Speech Translation., , and . INTERSPEECH, page 121-125. ISCA, (2022)30.4 A 1Tb 3b/Cell 3D-Flash Memory in a 170+ Word-Line-Layer Technology., , , , , , , , , and 49 other author(s). ISSCC, page 428-430. IEEE, (2021)A 512Gb 3b/Cell 3D flash memory on a 96-word-line-layer technology., , , , , , , , , and 54 other author(s). ISSCC, page 336-338. IEEE, (2018)A 128Gb 1-bit/Cell 96-Word-Line-Layer 3D Flash Memory to Improve the Random Read Latency With tProg = 75 μs and tR = 4 μs., , , , , , , , , and 14 other author(s). IEEE J. Solid State Circuits, 56 (1): 225-234 (2021)A 1.33-Tb 4-Bit/Cell 3-D Flash Memory on a 96-Word-Line-Layer Technology., , , , , , , , , and 39 other author(s). IEEE J. Solid State Circuits, 55 (1): 178-188 (2020)Improving Speech Translation Accuracy and Time Efficiency With Fine-Tuned wav2vec 2.0-Based Speech Segmentation., , and . IEEE ACM Trans. Audio Speech Lang. Process., (2024)A 1.6 GB/s DDR2 128 Mb Chain FeRAM With Scalable Octal Bitline and Sensing Schemes., , , , , , , , , and 23 other author(s). IEEE J. Solid State Circuits, 45 (1): 142-152 (2010)NAIST Simultaneous Speech-to-speech Translation System for IWSLT 2023., , , , , , , , , and . IWSLT@ACL, page 330-340. Association for Computational Linguistics, (2023)On Knowledge Distillation for Translating Erroneous Speech Transcriptions., , and . IWSLT, page 198-205. Association for Computational Linguistics, (2021)