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Micro-Raman spectroscopy analysis and capacitance - time (C-t) measurement of thinned silicon substrates for 3D integration.

, , , , , , , , and . 3DIC, page 1-5. IEEE, (2009)

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Impact of microbump induced stress in thinned 3D-LSIs after wafer bonding., , , , , , and . 3DIC, page 1-5. IEEE, (2010)10 µm fine pitch Cu/Sn micro-bumps for 3-D super-chip stack., , , , , , , , , and . 3DIC, page 1-6. IEEE, (2009)3D integration technology for 3D stacked retinal chip., , , , , , and . 3DIC, page 1-4. IEEE, (2009)Novel detachable bonding process with wettability control of bonding surface for versatile chip-level 3D integration., , , , and . 3DIC, page 1-4. IEEE, (2011)Heterogeneous integration technology for MEMS-LSI multi-chip module., , , , , , , and . 3DIC, page 1-6. IEEE, (2009)High reliable and fine size of 5-μm diameter backside Cu through-silicon Via(TSV) for high reliability and high-end 3-D LSIs., , , , , and . 3DIC, page 1-4. IEEE, (2011)Temporary bonding strength control for self-assembly-based 3D integration., , , , , , and . 3DIC, page 1-4. IEEE, (2011)A parallel ADC for high-speed CMOS image processing system with 3D structure., , , , , , and . 3DIC, page 1-4. IEEE, (2009)Micro-Raman spectroscopy analysis and capacitance - time (C-t) measurement of thinned silicon substrates for 3D integration., , , , , , , , and . 3DIC, page 1-5. IEEE, (2009)