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Disambiguation of "Bea, Jichoel"

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High reliable and fine size of 5-μm diameter backside Cu through-silicon Via(TSV) for high reliability and high-end 3-D LSIs.

, , , , , and . 3DIC, page 1-4. IEEE, (2011)

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Bea Harazd

Bea Klüsener

Wolfgang Bea

Wolfgang Bea

Bea Kastner

 

Other publications of authors with the same name

3D memory chip stacking by multi-layer self-assembly technology., , , , , , , , and . 3DIC, page 1-4. IEEE, (2013)Evaluation of alignment accuracy on chip-to-wafer self-assembly and mechanism on the direct chip bonding at room temperature., , , , , , and . 3DIC, page 1-5. IEEE, (2010)High reliable and fine size of 5-μm diameter backside Cu through-silicon Via(TSV) for high reliability and high-end 3-D LSIs., , , , , and . 3DIC, page 1-4. IEEE, (2011)Effect of CVD Mn oxide layer as Cu diffusion barrier for TSV., , , , , , , , and . 3DIC, page 1-4. IEEE, (2013)Impact of 3-D integration process on memory retention characteristics in thinned DRAM chip for 3-D memory., , , , , , , and . 3DIC, page 1-4. IEEE, (2013)Temporary bonding strength control for self-assembly-based 3D integration., , , , , , and . 3DIC, page 1-4. IEEE, (2011)10 µm fine pitch Cu/Sn micro-bumps for 3-D super-chip stack., , , , , , , , , and . 3DIC, page 1-6. IEEE, (2009)Development of via-last 3D integration technologies using a new temporary adhesive system., , , , and . 3DIC, page 1-4. IEEE, (2013)Impact of microbump induced stress in thinned 3D-LSIs after wafer bonding., , , , , , and . 3DIC, page 1-5. IEEE, (2010)Fabrication tolerance evaluation of high efficient unidirectional optical coupler for though silicon photonic via in optoelectronic 3D-LSI., , , , , and . 3DIC, page 1-4. IEEE, (2011)