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Disambiguation of "Rana, Vincenzo"

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Reconfigurable NoC design flow for multiple applications run-time mapping on FPGA devices.

, , , , , and . ACM Great Lakes Symposium on VLSI, page 421-424. ACM, (2009)

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Rana Kalkan

Auswirkungen der Erlangung von Berufstätigkeit auf die Lebensqualität von Menschen mit schweren psychischen Erkrankungen. Uni Ulm, (2010)

Shrikant Trimbak Ranade

Beate Ranacher

Gholamreza Ranaie

Obaida Rashid Rana

 

Other publications of authors with the same name

Improving the security and the scalability of the AES algorithm (abstract only)., , , and . FPGA, page 256. ACM, (2014)The Shining embedded system design methodology based on self dynamic reconfigurable architectures., , , , , and . ASP-DAC, page 595-600. IEEE, (2008)Design Methods for Parallel Hardware Implementation of Multimedia Iterative Algorithms., , , , , and . IEEE Des. Test, 30 (4): 71-80 (2013)A Decentralized System for Fair Token Distribution and Seamless Users Onboarding., , , , and . ISCC, page 1-6. IEEE, (2020)Fast IP-Core Generation in a Partial Dynamic Reconfiguration Workflow., , , , and . VLSI-SoC, page 74-79. IEEE, (2006)Time of arrival cumulative probability in public transportation travel assistance., , and . ITSC, page 1-6. IEEE, (2017)BuildingRules: A Trigger-Action-Based System to Manage Complex Commercial Buildings., , , , , , and . ACM Trans. Cyber Phys. Syst., 2 (2): 13:1-13:22 (2018)A Protocol for On-Chain Tenders., , , and . PerCom Workshops, page 273-278. IEEE, (2022)HARPE: A Harvard-based processing element tailored for partial dynamic reconfigurable architectures., , , and . IPDPS, page 1-8. IEEE, (2008)A novel design framework for the design of reconfigurable systems based on NoCs., and . ACM Great Lakes Symposium on VLSI, page 1-2. ACM, (2010)