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Disambiguation of "Anderson, Jason Helge"

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Analyzing and predicting the impact of CAD algorithm noise on FPGA speed performance and power.

, and . FPGA, page 107-110. ACM, (2012)

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Ian Jason

Hans Helge

Alexandra Helgert

Roland Helger

Thomas Helge

 

Other publications of authors with the same name

Physical Design Considerations for Synthesizable Standard-Cell-Based FPGAs., and . HEART, page 3:1-3:6. ACM, (2019)Leakage power reduction in FPGA DSP circuits through algorithmic noise tolerance., and . ReConFig, page 1-6. IEEE, (2013)From C to Blokus Duo with LegUp high-level synthesis., , , , , , , , , and 2 other author(s). FPT, page 486-489. IEEE, (2013)Resource and memory management techniques for the high-level synthesis of software threads into parallel FPGA hardware., , and . FPT, page 152-159. IEEE, (2015)Automated generation of banked memory architectures in the high-level synthesis of multi-threaded software., and . FPL, page 1-8. IEEE, (2017)An integer programming placement approach to FPGA clock power reduction., and . ASP-DAC, page 831-836. IEEE, (2011)ASAP: Automatic Sizing and Partitioning for Dynamic Memory Heaps in High-Level Synthesis., and . FPT, page 275-278. IEEE, (2019)Hybrid LUT/Multiplexer FPGA Logic Architectures., , , and . IEEE Trans. Very Large Scale Integr. Syst., 24 (4): 1280-1292 (2016)Raising FPGA Logic Density Through Synthesis-Inspired Architecture., , and . IEEE Trans. Very Large Scale Integr. Syst., 20 (3): 537-550 (2012)Emerging application domains: research challenges and opportunities for FPGAs.. FPGA, page 1-2. ACM, (2009)