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Timing-driven placement for FPGAs.

, , и . FPGA, стр. 203-213. ACM, (2000)

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Jonathan Burmeister

Jonathan Vöglein

Jonathan Rother

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Jonathan Dörr

 

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EVE: a CAD tool for manual placement and pipelining assistance of FPGA circuits., и . FPGA, стр. 85-94. ACM, (2002)The effect of LUT and cluster size on deep-submicron FPGA performance and density., и . FPGA, стр. 3-12. ACM, (2000)Using Architectural ``Families'' to Increase FPGA Speed and Density., и . FPGA, стр. 10-16. ACM, (1995)Architecture and CAD for Deep-Submicron FPGAS, , и . The Springer International Series in Engineering and Computer Science Kluwer, (1999)Speed and area tradeoffs in cluster-based FPGA architectures., , и . IEEE Trans. Very Large Scale Integr. Syst., 8 (1): 84-93 (2000)A novel and efficient routing architecture for multi-FPGA systems., и . IEEE Trans. Very Large Scale Integr. Syst., 8 (1): 30-39 (2000)A detailed router for field-programmable gate arrays., , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 11 (5): 620-628 (1992)Exploration and Customization of FPGA-Based Soft Processors., , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 26 (2): 266-277 (2007)Parallel global routing for standard cells.. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 9 (10): 1085-1095 (1990)A stochastic model to predict the routability of field-programmable gate arrays., , и . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 12 (12): 1827-1838 (1993)