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Disambiguation of "Bui, Duy-Hieu"

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An Efficient Event-driven Neuromorphic Architecture for Deep Spiking Neural Networks.

, , , and . SoCC, page 144-149. IEEE, (2019)

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Tran-Van Hieu

Mai The Duy

Dang Hieu

Justus Duyster

Justus Georg Duyster

 

Other publications of authors with the same name

H.264/AVC hardware encoders and low-power features., , , , , and . APCCAS, page 77-80. IEEE, (2014)Reducing temporal redundancy in MJPEG using Zipfian estimation techniques., , and . APCCAS, page 65-68. IEEE, (2014)Adaptive Architectures, Circuits and Technology Solutions for Future IoT Systems., , , , , , , , and . J. Low Power Electron., 13 (3): 298-309 (2017)Reducing Bitrate and Increasing the Quality of Inter Frame by Avoiding Quantization Errors in Stationary Blocks., , , , , and . EAI Endorsed Trans. Ind. Networks Intell. Syst., 7 (22): e2 (2020)A Novel Hardware Architecture for Human Detection using HOG-SVM Co-Optimization., , and . APCCAS, page 33-36. IEEE, (2019)Low-cost Low-Power Implementation of Binary Edwards Curve for Secure Passive RFID Tags., , , , and . MCSoC, page 494-500. IEEE, (2023)An Efficient Event-driven Neuromorphic Architecture for Deep Spiking Neural Networks., , , and . SoCC, page 144-149. IEEE, (2019)Ultra low-power and low-energy 32-bit datapath AES architecture for IoT applications., , , , and . ICICDT, page 1-4. IEEE, (2016)AES Datapath Optimization Strategies for Low-Power Low-Energy Multisecurity-Level Internet-of-Things Applications., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 25 (12): 3281-3290 (2017)An Adaptive Hardware Architecture using Quantized HOG Features for Object Detection., , , and . ICICDT, page 113-116. IEEE, (2022)